The present invention relates to a semiconductor device, and more specifically, to an anti-fuse for use in a semiconductor device.
Anti-fuses are used in the semiconductor industry for memory related applications such as field programmable gate arrays and programmable read-only memories. Most existing anti-fuses have a layer of anti-fuse material sandwiched in between two disconnected conductive materials. In such structures, the anti-fuse/circuit initially has a very high resistance, but after programming by electrical or optical means, the high resistance structure/circuit is converted to a lower resistance state. Anti-fuses generally include a material with a high resistance that can be converted into a lower resistance by the application of various optical or electrical means. An un-programmed anti-fuse gate array can be programmed by causing a selected anti-fuse to become conductive.
Many processes for integrating anti-fuses within an interconnect structure require many extra masking and etching steps which increase the overall cost of fabricating an integrated circuit. Therefore, a cost effective means for integrating an anti-fuse within an interconnect structure is needed which does not require any extra masking and etching steps. Further, anti-fuse dimensions can be limited by allowable photolithographic dimensions. Thus, it can be desirable to provide anti-fuses not limited by allowable photolithographic dimensions.